This device contains four independent Gates each of which performs a non-inverting buffer function. The outputs have the 3-state feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned off presenting a high-impedance state to the bus line. Thus the output will Act Neither as a significant load nor as a driver. To minimize the possibility that two outputs will ATTEMPT to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.